The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

According to reports from Electronic Enthusiasts Network (by Zhou Kaiyang), there have been numerous reports claiming that Nvidia’s exclusive acquisition negotiations for Arm have entered the final stages, with related parties stating that the transaction could be completed as early as late summer this year. As an architecture that supplies billions of chips to the market each year, this news has raised concerns about Arm’s position, and its open-source competitor RISC-V has begun to emerge in people’s minds.

As the dominant player in the mobile processor market, Arm is currently the mainstream RISC architecture. While Intel has triumphed in the PC sector with its CISC architecture, Apple’s shift of its Mac product line to Arm processors means Intel is about to lose its second-largest customer in the PC market. So, as a member of the RISC camp that also opposes CISC, can RISC-V compete with Arm? Let’s take a look at the achievements of this architecture among several leading manufacturers.

Pingtouge

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

Xuantie 910 architecture diagram / Pingtouge

Pingtouge, a semiconductor company under Alibaba Group, was formed by the integration of Zhongtianwei and the DAMO Academy team. On July 25 last year, Pingtouge announced its first research and development achievement after its establishment, the RISC-V architecture based processor IP core Xuantie 910.

Xuantie 910 is a 64-bit 16-core processor equipped with an AI vector acceleration engine, utilizing the RISC-V RV64GC instruction set and adopting a 12-stage superscalar pipeline.

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

CoreMark score comparison / Pingtouge

In performance testing, Xuantie 910 achieved 7.1 CoreMark/MHz, the highest level known for RISC-V processors. Each core supports 32-64KB of L1 data and instruction cache, with L2 cache reaching up to 8MB, all shared among clusters, similar to Arm’s big.LITTLE architecture. In addition, this IP core is compatible with the RVV 0.7.1 version of the vector extension; Pingtouge claims that when the IP core began design, it was still in the early RVV version, and future updates will follow the 1.0 version.

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

Performance comparison of Xuantie 910 and Cortex (EEMBC above, NBench below)

This Xuantie 910 from Pingtouge is aimed to compete with Arm’s Cortex-A73. When experimenting and comparing with the Cortex-A73 core in Kirin 970, it can be seen that Xuantie 910 outperforms Cortex-A73 in many aspects. However, this does not mean that Xuantie 910 is as mature as Cortex-A73; as a newly announced RISC-V IP core, Pingtouge claims that years of open collaboration are still needed to cover some additional edge cases.

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

Pingtouge RISC-V Xuantie Processor / Electronic Enthusiasts Network Photo

In addition, Pingtouge also announced the open-source low-power MCU design platform last year, featuring the RISC-V 32-bit Xuantie 902. In the future, Pingtouge will also introduce a series of RISC-V IP cores including Xuantie 903, 907, and 908. Currently, Xuantie 910 has been implemented in the Ant Financial’s AntChain integrated machine FPGA, achieving a frequency of 200MHz. By July of this year, the Xuantie 910 CPU, utilizing a 28nm HPC+ process, could reach a frequency of 1.6GHz. In September, Pingtouge will launch a CPU using TSMC’s 12nm FinFET process, which can increase the frequency to over 2.0GHz. At the end of last month, Allwinner announced a comprehensive cooperation with Pingtouge, aiming to create AP-level RISC-V products, developing general-purpose computing chips based on Xuantie 902 and 906, with the first RISC-V SoC expected to be launched in 2021.

SiFive

SiFive was founded by the creators of RISC-V and is the first company to produce RISC-V chips. On August 11 this year, SiFive announced that it has raised $60 million from investors including SK Hynix and Saudi Aramco, with existing investors Intel, Qualcomm, and Western Digital also participating in this round of financing.

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

SiFive product planning / SiFive

In addition to single-issue processor cores of series 2, 3, and 5, SiFive also launched dual-issue processors in the 7 series and the superscalar processors in the 8 series announced last October. This includes E series 32-bit processors for MCU, edge computing, and IoT, S series for storage, AR/VR, and machine learning, and U series for data centers and network baseband.

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

U84 architecture diagram / SiFive

The U8 series is currently SiFive’s highest performance RISC-V processor series, specifically designed for performance and latency-sensitive market applications, such as automotive, data centers, and deep learning SoCs. This series currently includes the U84 optimized for power and area efficiency and the U87 IP core with additional vector processing. In addition, the U8 series will utilize a new 7nm process, achieving 5.3-7.2 times the performance of the 28nm process U54.

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

U84 performance / SiFive

A four-core 2MB L2 cache U84 CPU can reach a frequency of 2.6GHz with an area of only 2.63mm² under a 7nm process. SiFive compared the U84 standard core with Arm’s Cortex-A72, achieving double the area efficiency and 1.5 times the performance of the latter.

Xinlai

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

Xinlai RISC-V IP product roadmap / Xinlai

Xinlai Technology is the first professional RISC-V IP company in mainland China, and also a silver member of the RISC-V Foundation. Xinlai Technology has a clear roadmap for its self-developed RISC-V IP products. The N100 series meets the upgrade needs of traditional 8/16-bit cores, targeting ultra-low-power scenarios such as IoT; the N200 series is designed for low power and embedded scenarios, replacing 8051 and Arm Cortex-M cores; and the N300 series targets energy efficiency, competing with Arm-Cortex M4 and similar cores, suitable for IoT and industrial control. For higher performance demands in scenarios such as Linux, edge computing, and data centers, Xinlai has also launched the 600 and planned 900 series, as well as higher-level multi-core 64-bit architectures such as NX and UX.

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

UX600 series system block diagram / Xinlai Technology

At the end of May this year, Xinlai Technology released the UX600 series 64-bit high-performance RISC-V processor, targeting Arm’s Cortex-A7, A9, and A35. This processor adopts a 6-stage pipeline architecture, with configurable instruction and data cache sizes, and has ECC protection features. Meanwhile, Xinlai Technology has completed the porting of Linux on the UX600 processor and driver development.

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

GD32VF103 series general-purpose MCU / Zhaoyi Innovation

Xinlai Technology collaborated with Zhaoyi Innovation to develop the GD32VF103 series RISC-V general-purpose MCU, where the Bumblebee core is customized and licensed by Xinlai Technology, suitable for ultra-low-power scenarios such as IoT. At the same frequency of 108MHz, its performance is 15% better than Arm Cortex-M3, with maximum dynamic current reduced by 50% and standby current reduced by 25%.

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

N22 processor architecture diagram / Xinxin Technology

Xinlai also developed the N22 processor based on the N200 series architecture for Taiwan’s Xinxin Technology, which supports Xinxin’s own RISC-V V5/V5e extended instruction set, achieving a processor performance of 3.93 CoreMark/MHz, with a frequency of up to 800MHz.

Conclusion

As an open-source architecture, RISC-V does not have to worry about licensing fees, and the development community is also more open. Out of concerns over trade restrictions and to maintain technological neutrality, the RISC-V Foundation has moved its headquarters from the United States to the neutral country of Switzerland, so suppliers do not have to worry about trade blockades and bans.

Despite this, the development of RISC-V is still in its early stages and is not a complete and stable instruction set architecture, as the current HDL soft cores and software tools for RISC-V are not yet mature. Moreover, the performance of RISC-V processors has not yet reached a level sufficient to compete with Arm’s high-end products; even the best-performing RISC-V processor IP core currently only competes with Arm Cortex A73, let alone the flagship core Arm Cortex A77, which has further improved performance by 20% in the next generation A78.

However, competition and pressure are the norms of the processor market. Even in the open-source RISC market, RISC-V faces competition from SPARC, Power, and SuperH. A similar scene also occurred in the 8-bit CPU market in the 1980s, where every manufacturer wanted to promote their own architecture and chips, with two major contenders being Zilog’s Z80 and MOS’s 6502. However, a newcomer called Intel began to rise and eventually dominated the desktop CPU market. RISC-V finds itself in a similarly competitive yet more open situation, where many manufacturers are more willing to promote the next valuable market, which is also the reason why Qualcomm and even Intel itself are investing in the RISC-V architecture.

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

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