This book uses Xilinx’s XC7Z020 Zynq-7000 SoC device and the latest Xilinx Vivado 2015.4 integrated development environment as a platform, providing a comprehensive introduction to the complete design process of embedded system design. The author has constructed a core learning resource that includes video teaching resources, design case code, teaching materials, QQ group discussions, and more, to facilitate interaction and communication between readers and the author.

Partial Directory:

Chapter 1 Introduction to Zynq-7000 SoC Design1.1 Basics of Fully Programmable System on Chip1.1.1 Evolution of Fully Programmable System on Chip1.1.2 Comparison of SoC with MCU and CPU1.1.3 Background of Fully Programmable SoC’s Birth1.1.4 Technical Features of Programmable SoC Systems1.1.5 Types of Processors in Fully Programmable Systems on Chip1.2 Functions and Structure of Zynq-7000 SoC1.2.1 Classification and Resources of Zynq-7000 SoC Products1.2.2 Functions of Xilinx Zynq-7000 SoC1.2.3 Composition of the Processing System PS in Zynq-7000 SoC1.2.4 Composition of Programmable Logic PL in Zynq-7000 SoC1.2.5 Interconnection Structure within Zynq-7000 SoC1.2.6 Power Supply Pins of Zynq-7000 SoC1.2.7 Connection from MIO to EMIO within Zynq-7000 SoC1.2.8 Signals Allocated for PL within Zynq-7000 SoC1.3 Advantages of Zynq-7000 SoC in Embedded Systems1.3.1 Using PL to Implement Software Algorithms1.3.2 Reducing Power Consumption1.3.3 Real-time Offloading1.3.4 Reconfigurable Computing1.4 Vivado Design Process for Zynq-7000 SoC1.4.1 IP Design and System-Level Design Integration in Vivado1.4.2 Design Process Using RTL or Netlist1.4.3 IP Subsystem Design1.4.4 Embedded Processor Hardware Design1.4.5 DSP Design Using Models and High-Level Synthesis1.4.6 Context-Free Design Process1.4.7 I/O Pin Planning and Layout1.4.8 Design Analysis and Verification1.4.9 Device Programming and Hardware Verification1.4.10 Partial Reconfiguration